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GECCO
2010
Springer
249views Optimization» more  GECCO 2010»
13 years 12 months ago
Towards improved dispatching rules for complex shop floor scenarios: a genetic programming approach
Developing dispatching rules for manufacturing systems is a tedious process, which is time- and cost-consuming. Since there is no good general rule for different scenarios and ob...
Torsten Hildebrandt, Jens Heger, Bernd Scholz-Reit...
CGO
2009
IEEE
14 years 4 months ago
Software Pipelined Execution of Stream Programs on GPUs
—The StreamIt programming model has been proposed to exploit parallelism in streaming applications on general purpose multicore architectures. This model allows programmers to sp...
Abhishek Udupa, R. Govindarajan, Matthew J. Thazhu...
ISPAN
1997
IEEE
14 years 2 months ago
A method for estimating optimal unrolling times for nested loops
Loop unrolling is one of the most promising parallelization techniques, because the nature of programs causes most of the processing time to be spent in their loops. Unrolling not...
Akira Koseki, Hideaki Komatsu, Yoshiaki Fukazawa
CODES
2008
IEEE
14 years 4 months ago
Speculative DMA for architecturally visible storage in instruction set extensions
Instruction set extensions (ISEs) can accelerate embedded processor performance. Many algorithms for ISE generation have shown good potential; some of them have recently been expa...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...
ISCAS
2005
IEEE
155views Hardware» more  ISCAS 2005»
14 years 3 months ago
Hyperblock formation: a power/energy perspective for high performance VLIW architectures
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...