378 search results - page 27 / 76 » Optimal integrated code generation for VLIW architectures |
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
Abstract—This paper presents a novel high-efficient hybrid openclose loop based fine granularity scalable (HOCFGS) coding framework supporting different decoding complexity appli...
ICCD
2004
IEEE
14 years 5 months ago
2004
IEEE
We selectively generate and optimize the frames constructed by the rePLay architecture statically. Since static analysis provides a global view of the interaction between the basi...
WWW
2006
ACM
2006
ACM
XML screamer: an integrated approach to high performance XML parsing, validation and deserialization
14 years 9 months ago
This paper describes an experimental system in which customized high performance XML parsers are prepared using parser generation and compilation techniques. Parsing is integrated...
EMSOFT
2001
Springer
14 years 28 days ago
2001
Springer
Abstract. Advances in VLSI technology have lead to a tremendous increase in the density and number of devices that can be manufactured in a single microchip. One of the interesting...
ASPDAC
2001
ACM
14 years 2 days ago
2001
ACM
This paper deals with address assignment in code generation for digital signal processors (DSPs) with SIMD (single instruction multiple data) memory accesses. In these processors ...