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» Optimal integrated code generation for VLIW architectures
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PLDI
2012
ACM
11 years 11 months ago
Fast and precise hybrid type inference for JavaScript
JavaScript performance is often bound by its dynamically typed nature. Compilers do not have access to static type information, making generation of efficient, type-specialized m...
Brian Hackett, Shu-yu Guo
DATE
2003
IEEE
117views Hardware» more  DATE 2003»
14 years 1 months ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen
LCTRTS
2010
Springer
14 years 3 months ago
Analysis and approximation for bank selection instruction minimization on partitioned memory architecture
A large number of embedded systems include 8-bit microcontrollers for their energy efficiency and low cost. Multi-bank memory architecture is commonly applied in 8-bit microcontr...
Minming Li, Chun Jason Xue, Tiantian Liu, Yingchao...
WIESS
2000
13 years 9 months ago
Stub-Code Performance Is Becoming Important
As IPC mechanisms become faster, stub-code efficiency becomes a performance issue for local client/server RPCs and inter-component communication. Inefficient and unnecessary compl...
Andreas Haeberlen, Jochen Liedtke, Yoonho Park, La...
DAC
2009
ACM
14 years 9 months ago
WCET-aware register allocation based on graph coloring
Current compilers lack precise timing models guiding their built-in optimizations. Hence, compilers apply ad-hoc heuristics during optimization to improve code quality. One of the...
Heiko Falk