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ICPPW
2005
IEEE
14 years 1 months ago
Speculative Parallel Threading Architecture and Compilation
Thread-level speculation is a technique that brings thread-level parallelism beyond the data-flow limit by executing a piece of code ahead of time speculatively before all its inp...
Xiao-Feng Li, Zhao-Hui Du, Chen Yang, Chu-Cheow Li...
CODES
2005
IEEE
14 years 1 months ago
Improving superword level parallelism support in modern compilers
Multimedia vector instruction sets are becoming ubiquitous in most of the embedded systems used for multimedia, networking and communications. However, current compiler technology...
Christian Tenllado, Luis Piñuel, Manuel Pri...
ICS
1999
Tsinghua U.
13 years 11 months ago
High-level semantic optimization of numerical codes
This paper presents a mathematical framework to exploit the semantic properties of matrix operations in loop-based numerical codes. The heart of this framework is an algebraic lan...
Vijay Menon, Keshav Pingali
SC
1992
ACM
13 years 11 months ago
Compiler Code Transformations for Superscalar-Based High Performance Systems
Exploiting parallelism at both the multiprocessor level and the instruction level is an e ective means for supercomputers to achieve high-performance. The amount of instruction-le...
Scott A. Mahlke, William Y. Chen, John C. Gyllenha...
IPPS
1999
IEEE
13 years 11 months ago
Hyperplane Partitioning: An Approach to Global Data Partitioning for Distributed Memory Machines
Automatic Global Data Partitioning for Distributed Memory Machines DMMs is a di cult problem. In this work, we present a partitioning strategy called 'Hyperplane Partitioning...
S. R. Prakash, Y. N. Srikant