We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...
In this paper, a novel nonlinear Volterra equalizer is presented. We define a framework for nonlinear second-order Volterra models, which is applicable to different applications in...
Christoph Krall, Klaus Witrisal, Geert Leus, Heinz...
Dictionary compression mechanisms identify redundant sequences of instructions that occur in a program. The sequences are extracted and copied to a dictionary. Each sequence is th...
Philip Brisk, Jamie Macbeth, Ani Nahapetian, Majid...
This paper discusses ECG biometric recognition in a distributed system, such as smart cards. In a setting where every card is equipped with an ECG sensor to record heart beats fro...
Abstract. SAT Modulo Theories (SMT) consists of deciding the satisfiability of a formula with respect to a decidable background theory, such as linear integer arithmetic, bit-vect...