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CODES
2006
IEEE
14 years 3 months ago
A bus architecture for crosstalk elimination in high performance processor design
In deep sub-micron technology, the crosstalk effect between adjacent wires has become an important issue, especially between long on-chip buses. This effect leads to the increas...
Wen-Wen Hsieh, Po-Yuan Chen, TingTing Hwang
CF
2004
ACM
14 years 3 months ago
Predictable performance in SMT processors
Current instruction fetch policies in SMT processors are oriented towards optimization of overall throughput and/or fairness. However, they provide no control over how individual ...
Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz...
ADT
2005
13 years 9 months ago
High rate compression of CAD meshes based on subdivision inversion
In this paper we present a new framework, based on subdivision surface approximation, for efficient compression and coding of 3D models represented by polygonal meshes. Our algorit...
Guillaume Lavoué, Florent Dupont, Atilla Ba...
ICCAD
2009
IEEE
171views Hardware» more  ICCAD 2009»
13 years 7 months ago
A hybrid local-global approach for multi-core thermal management
Multi-core processors have become an integral part of mainstream high performance computer systems. In parallel, exponentially increasing power density and packaging costs have ne...
Ramkumar Jayaseelan, Tulika Mitra
HPCC
2007
Springer
14 years 4 months ago
FROCM: A Fair and Low-Overhead Method in SMT Processor
Simultaneous Multithreading (SMT)[1][2] and chip multiprocessors (CMP) processors [3] have emerged as the mainstream computing platform in major market segments, including PC, serv...
Shuming Chen, Pengyong Ma