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» Optimization of in-network data reduction
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HPCA
2009
IEEE
14 years 10 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
SAC
2009
ACM
14 years 4 months ago
Visualization of clustered directed acyclic graphs with node interleaving
Graph drawing and visualization represent structural information ams of abstract graphs and networks. An important subset of graphs is directed acyclic graphs (DAGs). E-Spring alg...
Pushpa Kumar, Kang Zhang
CF
2009
ACM
14 years 4 months ago
Mapping the LU decomposition on a many-core architecture: challenges and solutions
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
Ioannis E. Venetis, Guang R. Gao
MM
2004
ACM
167views Multimedia» more  MM 2004»
14 years 3 months ago
Learning an image manifold for retrieval
We consider the problem of learning a mapping function from low-level feature space to high-level semantic space. Under the assumption that the data lie on a submanifold embedded ...
Xiaofei He, Wei-Ying Ma, HongJiang Zhang
AAAI
2004
13 years 11 months ago
Interactive Information Extraction with Constrained Conditional Random Fields
Information Extraction methods can be used to automatically "fill-in" database forms from unstructured data such as Web documents or email. State-of-the-art methods have...
Trausti T. Kristjansson, Aron Culotta, Paul A. Vio...