Sciweavers

92 search results - page 14 / 19
» Optimization of shield structures in analog integrated circu...
Sort
View
ISPD
2004
ACM
171views Hardware» more  ISPD 2004»
14 years 1 months ago
Structured ASIC, evolution or revolution?
This paper describes the structured ASIC technology and impacts to the implementation flow. With an optimized and programmable structure, the structured ASIC technology indeed int...
Kun-Cheng Wu, Yu-Wen Tsai
ASPDAC
2005
ACM
106views Hardware» more  ASPDAC 2005»
13 years 9 months ago
On structure and suboptimality in placement
Abstract— Regular structures are present in many types of circuits. If this structure can be identified and utilized, performance can be improved dramatically. In this paper, we...
Satoshi Ono, Patrick H. Madden
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
14 years 4 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
DAC
2003
ACM
14 years 8 months ago
An O(nlogn) time algorithm for optimal buffer insertion
The classic algorithm for optimal buffer insertion due to van Ginneken has time and space complexity O(n2 ), where n is the number of possible buffer positions. We present a new a...
Weiping Shi, Zhuo Li
SLIP
2009
ACM
14 years 2 months ago
Prediction of high-performance on-chip global interconnection
Different interconnection structures have been proposed to solve the performance limitation caused by scaling of on-chip global wires. In this paper, we give an overview of curre...
Yulei Zhang, Xiang Hu, Alina Deutsch, A. Ege Engin...