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126
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ICS
2009
Tsinghua U.
15 years 10 months ago
2009
Tsinghua U.
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
120
Voted
ICC
2009
IEEE
15 years 10 months ago
2009
IEEE
Relays play an important role for increasing rate and reducing energy consumption of wireless networks. In this paper we consider a three-node network (source, relay, destination)...
127
Voted
EUROPAR
2009
Springer
15 years 10 months ago
2009
Springer
Optimal network performance is critical to efficient parallel scaling for communication-bound applications on large machines. With wormhole routing, no-load latencies do not increa...
118
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EMSOFT
2007
Springer
15 years 10 months ago
2007
Springer
Software components are modular and can enable post-deployment update, but their high overhead in runtime and memory is prohibitive for many embedded systems. This paper proposes ...
170
Voted
ICS
2007
Tsinghua U.
15 years 10 months ago
2007
Tsinghua U.
Software or hardware data cache prefetching is an efficient way to hide cache miss latency. However effectiveness of the issued prefetches have to be monitored in order to maximi...