Sciweavers

31 search results - page 1 / 7
» Optimizations for Faster Execution of Esterel Programs
Sort
View
MEMOCODE
2003
IEEE
14 years 23 days ago
Optimizations for Faster Execution of Esterel Programs
Several efficient compilation techniques have been recently proposed for the generation of sequential (C) code from Esterel programs. Consisting essentially in direct simulation ...
Dumitru Potop-Butucaru, Robert de Simone
CODES
2008
IEEE
13 years 9 months ago
Performance debugging of Esterel specifications
Synchronous languages like Esterel have been widely adopted for designing reactive systems in safety-critical domains such as avionics. Specifications written in Esterel are based...
Lei Ju, Bach Khoa Huynh, Abhik Roychoudhury, Samar...
FCCM
2002
IEEE
109views VLSI» more  FCCM 2002»
14 years 14 days ago
Compiling ATR Probing Codes for Execution on FPGA Hardware
This paper describes the implementation of an automatic target recognition ATR Probing algorithm on a recon gurable system, using the SA-C programming language and optimizing co...
A. P. Wim Böhm, J. Ross Beveridge, Bruce A. D...
HIPEAC
2011
Springer
12 years 7 months ago
NoC-aware cache design for multithreaded execution on tiled chip multiprocessors
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
Ahmed Abousamra, Alex K. Jones, Rami G. Melhem
ASPDAC
2007
ACM
117views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Short-Circuit Compiler Transformation: Optimizing Conditional Blocks
Abstract-- We present the short-circuit code transformation technique, intended for embedded compilers. The transformation technique optimizes conditional blocks in high-level prog...
Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau