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» Optimizations for a Highly Cost-Efficient Programmable Logic...
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PEPM
2009
ACM
13 years 12 months ago
Translation and optimization for a core calculus with exceptions
A requirement of any source language is to be rich in features and concise to use by the programmers. As a drawback, it is often too complex to analyse, causing research studies t...
Cristina David, Cristian Gherghina, Wei-Ngan Chin
FPL
2003
Springer
95views Hardware» more  FPL 2003»
14 years 17 days ago
Reconfigurable Hardware SAT Solvers: A Survey of Systems
By adapting to computations that are not so well supported by general-purpose processors, reconfigurable systems achieve significant increases in performance. Such computational sy...
Iouliia Skliarova, António de Brito Ferrari
FPGA
2008
ACM
191views FPGA» more  FPGA 2008»
13 years 9 months ago
A hardware framework for the fast generation of multiple long-period random number streams
Stochastic simulations and other scientific applications that depend on random numbers are increasingly implemented in a parallelized manner in programmable logic. High-quality ps...
Ishaan L. Dalal, Deian Stefan
ISLPED
2010
ACM
351views Hardware» more  ISLPED 2010»
13 years 7 months ago
Hybrid electrical energy storage systems
Electrical energy is a high quality form of energy that can be easily converted to other forms of energy with high efficiency and, even more importantly, it can be used to control...
Massoud Pedram, Naehyuck Chang, Younghyun Kim, Yan...
VLSID
2005
IEEE
167views VLSI» more  VLSID 2005»
14 years 7 months ago
A Methodology and Tooling Enabling Application Specific Processor Design
This paper presents a highly efficient processor design methodology based on the LISA 2.0 language. Typically the architecture design phase is dominated by an iterative processor ...
Andreas Hoffmann, Frank Fiedler, Achim Nohl, Suren...