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ASAP
2009
IEEE
98views Hardware» more  ASAP 2009»
15 years 22 days ago
A Power-Scalable Switch-Based Multi-processor FFT
This paper examines the architecture, algorithm and implementation of a switch-based multi-processor realization of the fast Fourier transform (FFT). The architecture employs M pr...
Bassam Jamil Mohd, Earl E. Swartzlander Jr.
123
Voted
CORR
2007
Springer
93views Education» more  CORR 2007»
15 years 2 months ago
Type-IV DCT, DST, and MDCT algorithms with reduced numbers of arithmetic operations
We present algorithms for the type-IV discrete cosine transform (DCT-IV) and discrete sine transform (DST-IV), as well as for the modified discrete cosine transform (MDCT) and it...
Xuancheng Shao, Steven G. Johnson
EH
2004
IEEE
110views Hardware» more  EH 2004»
15 years 6 months ago
A Genetic Algorithm for the Optimisation of a Reconfigurable Pipelined FFT Processor
This paper describes the optimisation of the word length in a 16-point radix-4 reconfigurable pipelined Fast Fourier Transform (FFT) based receiver device. Two forms of optimisati...
Nasri Sulaiman, Tughrul Arslan
CVPR
2010
IEEE
15 years 11 months ago
Fast Image Alignment in the Fourier Domain
In this paper we propose a framework for gradient descent image alignment in the Fourier domain. Specifically, we propose an extension to the classical Lucas & Kanade (LK) a...
Ahmed Ashraf, Simon Lucey, Tsuhan Chen
IPPS
2002
IEEE
15 years 7 months ago
A SIMD Vectorizing Compiler for Digital Signal Processing Algorithms
Short vector SIMD instructions on recent microprocessors, such as SSE on Pentium III and 4, speed up code but are a major challenge to software developers. We present a compiler t...
Franz Franchetti, Markus Püschel