1251 search results - page 218 / 251 » Optimizing Compilation of CLP(R) |
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...
CODES
2002
IEEE
14 years 1 months ago
2002
IEEE
This paper presents an automatic method to customize embedded application-specific instruction processors (ASIPs) based on compiler analysis. ASIPs, also known as embedded soft c...
FCCM
2002
IEEE
14 years 1 months ago
2002
IEEE
This paper explores the implications of integrating flexible module generation into a compiler for FPGAs. The objective is to improve the programmabilityof FPGAs, or in other wor...
IEEEPACT
2002
IEEE
14 years 1 months ago
2002
IEEE
Java exception checks are designed to ensure that any faulting instruction causing a hardware exception does not terminate the program abnormally. These checks, however, impose so...
IPPS
2002
IEEE
14 years 1 months ago
2002
IEEE
SAC is a purely functional array processing language designed with numerical applications in mind. It supports generic, high-level program specifications in the style of APL. How...