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» Optimizing Compilation of CLP(R)
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DATE
2006
IEEE
82views Hardware» more  DATE 2006»
14 years 2 months ago
Power-aware compilation for embedded processors with dynamic voltage scaling and adaptive body biasing capabilities
Traditionally, active power has been the primary source of power dissipation in CMOS designs. Although, leakage power is becoming increasingly more important as technology feature...
Po-Kuan Huang, Soheil Ghiasi
TAPSOFT
1997
Springer
14 years 19 days ago
A Typed Intermediate Language for Flow-Directed Compilation
We present a typed intermediate language λCIL for optimizing compilers for function-oriented and polymorphically typed programming languages (e.g., ML). The language λCIL is a ty...
J. B. Wells, Allyn Dimock, Robert Muller, Franklyn...
PLDI
1995
ACM
14 years 20 hour ago
Interprocedural Partial Redundancy Elimination and its Application to Distributed Memory Compilation
Partial Redundancy Elimination PRE is a general scheme for suppressing partial redundancies which encompasses traditional optimizations like loop invariant code motion and redun...
Gagan Agrawal, Joel H. Saltz, Raja Das
PLDI
2012
ACM
11 years 11 months ago
Adaptive input-aware compilation for graphics engines
While graphics processing units (GPUs) provide low-cost and efficient platforms for accelerating high performance computations, the tedious process of performance tuning required...
Mehrzad Samadi, Amir Hormati, Mojtaba Mehrara, Jan...
INFOCOM
1999
IEEE
14 years 23 days ago
Techniques for Optimizing CORBA Middleware for Distributed Embedded Systems
The distributed embedded systems industry is poised to leverage emerging real-time operating systems, such as Inferno, Windows CE 2.0, and Palm OS, to support mobile communication...
Aniruddha S. Gokhale, Douglas C. Schmidt