Sciweavers

1251 search results - page 47 / 251
» Optimizing Compilation of CLP(R)
Sort
View
MICRO
2005
IEEE
144views Hardware» more  MICRO 2005»
14 years 3 months ago
A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance
Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardw...
Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vi...
CASES
2007
ACM
14 years 1 months ago
A simplified java bytecode compilation system for resource-constrained embedded processors
Embedded platforms are resource-constrained systems in which performance and memory requirements of executed code are of critical importance. However, standard techniques such as ...
Carmen Badea, Alexandru Nicolau, Alexander V. Veid...
IPPS
2007
IEEE
14 years 4 months ago
Linking Compilation and Visualization for Massively Parallel Programs
This paper presents a technique to visualize the communication pattern of a parallel application at different points during its execution. Unlike many existing tools that show the...
Alex K. Jones, Raymond R. Hoare, Joseph St. Onge, ...
VEE
2010
ACM
192views Virtualization» more  VEE 2010»
13 years 10 months ago
Evaluation of a just-in-time compiler retrofitted for PHP
Programmers who develop Web applications often use dynamic scripting languages such as Perl, PHP, Python, and Ruby. For general purpose scripting language usage, interpreter-based...
Michiaki Tatsubori, Akihiko Tozawa, Toyotaro Suzum...
FCCM
2002
IEEE
109views VLSI» more  FCCM 2002»
14 years 2 months ago
Compiling ATR Probing Codes for Execution on FPGA Hardware
This paper describes the implementation of an automatic target recognition ATR Probing algorithm on a recon gurable system, using the SA-C programming language and optimizing co...
A. P. Wim Böhm, J. Ross Beveridge, Bruce A. D...