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IPPS
1998
IEEE
15 years 8 months ago
1998
IEEE
129
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AIR
2002
15 years 3 months ago
2002
106
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CN
2011
14 years 10 months ago
2011
131
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DATE
2008
IEEE
15 years 10 months ago
2008
IEEE
Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we p...
142
Voted
DAC
2007
ACM
16 years 4 months ago
2007
ACM
The memory hierarchy of a system can consume up to 50% of microprocessor system power. Previous work has shown that tuning a configurable cache to a particular application can red...