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VLSID
2009
IEEE
177views VLSI» more  VLSID 2009»
14 years 8 months ago
Accelerating System-Level Design Tasks Using Commodity Graphics Hardware: A Case Study
Many system-level design tasks (e.g. timing analysis, hardware/software partitioning and design space exploration) involve computational kernels that are intractable (usually NP-ha...
Unmesh D. Bordoloi, Samarjit Chakraborty
ECCC
2011
207views ECommerce» more  ECCC 2011»
13 years 2 months ago
Balls and Bins: Smaller Hash Families and Faster Evaluation
A fundamental fact in the analysis of randomized algorithm is that when n balls are hashed into n bins independently and uniformly at random, with high probability each bin contai...
L. Elisa Celis, Omer Reingold, Gil Segev, Udi Wied...
ACSC
2009
IEEE
14 years 2 months ago
The Impact of Quanta on the Performance of Multi-level Time Sharing Policy under Heavy-tailed Workloads
Recent research indicates that modern computer workloads (e.g. processing time of web requests) follow heavy-tailed distributions. In a heavy-tailed distribution there are a large...
Malith Jayasinghe, Zahir Tari, Panlop Zeephongseku...
BMCBI
2005
201views more  BMCBI 2005»
13 years 7 months ago
Principal component analysis for predicting transcription-factor binding motifs from array-derived data
Background: The responses to interleukin 1 (IL-1) in human chondrocytes constitute a complex regulatory mechanism, where multiple transcription factors interact combinatorially to...
Yunlong Liu, Matthew P. Vincenti, Hiroki Yokota
VLSID
2005
IEEE
285views VLSI» more  VLSID 2005»
14 years 8 months ago
Power Monitors: A Framework for System-Level Power Estimation Using Heterogeneous Power Models
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
Nikhil Bansal, Kanishka Lahiri, Anand Raghunathan,...