244 search results - page 14 / 49 » Optimizing Loop Performance for Clustered VLIW Architectures |
CCGRID
2008
IEEE
14 years 2 months ago
2008
IEEE
The advances in multicore technology and modern interconnects is rapidly accelerating the number of cores deployed in today’s commodity clusters. A majority of parallel applicat...
VLSISP
2008
13 years 7 months ago
2008
Many different video processor architectures exist. Its architecture gives a processor strength for a particular application. Hardwired logic yields the best performance/cost, but ...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents a technique for memory optimization for a class of computations that arises in the field of correlated electronic structure methods such as coupled cluster and...
BIBE
2008
IEEE
14 years 2 months ago
2008
IEEE
— The Smith-Waterman algorithm is a dynamic programming method for determining optimal local alignments between nucleotide or protein sequences. However, it suffers from quadrati...
MICRO
1998
IEEE
14 years 16 hour ago
1998
IEEE
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...