244 search results - page 24 / 49 » Optimizing Loop Performance for Clustered VLIW Architectures |
APLAS
2005
ACM
14 years 1 months ago
2005
ACM
This paper presents a novel method to construct a dynamic single assignment (DSA) form of array-intensive, pointer-free C programs (or in any other procedural language). A program ...
CODES
2009
IEEE
13 years 11 months ago
2009
IEEE
Profilers play an important role in software/hardware design, optimization, and verification. Various approaches have been proposed to implement profilers. The most widespread app...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
ng Automatic Abstraction Refinement for Generalized Symbolic Trajectory Evaluation Yan Chen Dept. of Computer Science Portland State University Portland, OR, 97207 chenyan@cs.pdx.e...
ISPAN
1997
IEEE
14 years 3 hour ago
1997
IEEE
The thesis of this research is that the task of exposing the parallelism in a given application should be left to the algorithm designer, who has intimate knowledge of the applica...
IPPS
1999
IEEE
14 years 2 days ago
1999
IEEE
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...