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CASES
2007
ACM
13 years 12 months ago
2007
ACM
Recently dual-port SDRAM (DPSDRAM) architecture tailored for dual-processor based mobile embedded systems has been announced where a single memory chip plays the role of the local...
IPPS
2002
IEEE
14 years 23 days ago
2002
IEEE
In this paper, we present an in-depth analysis of the memory system performance of the DSS commercial workloads on two state-of-the-art multiprocessors: the SGI Origin 2000 and th...
HPCA
2000
IEEE
14 years 7 days ago
2000
IEEE
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
UPC’s implicit communication and fine-grain programming style make application performance modeling a challenging task. The correspondence between remote references and communi...
IEEECIT
2010
IEEE
13 years 6 months ago
2010
IEEE
Abstract—In this paper, we propose efficient routing algorithms for collective communication in a newly proposed, versatile network, called a recursive dual-net (RDN). The RDN c...