2932 search results - page 95 / 587 » Optimizing Memory System Performance for Communication in Pa... |
SC
2004
ACM
14 years 1 months ago
2004
ACM
The Merrimac supercomputer uses stream processors and a highradix network to achieve high performance at low cost and low power. The stream architecture matches the capabilities o...
GECCO
2010
Springer
13 years 8 months ago
2010
Springer
In this paper we present a concurrent implementation of genetic algorithms designed for shared memory architectures intended to take advantage of multi-core processor platforms. O...
IEEEPACT
2005
IEEE
14 years 1 months ago
2005
IEEE
Dynamic optimization has the potential to adapt the program’s behavior at run-time to deliver performance improvements over static optimization. Dynamic optimization systems usu...
DCOSS
2005
Springer
14 years 1 months ago
2005
Springer
We consider a scenario in which anonymous, finite-state sensing devices are deployed in an ad-hoc communication network of arbitrary size and unknown topology, and explore what p...
ISCA
2008
IEEE
14 years 2 months ago
2008
IEEE
Efficiently utilizing off-chip DRAM bandwidth is a critical issue in designing cost-effective, high-performance chip multiprocessors (CMPs). Conventional memory controllers deli...