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IPPS
2002
IEEE
14 years 1 months ago
Efficient Pipelining of Nested Loops: Unroll-and-Squash
The size and complexity of current custom VLSI have forced the use of high-level programming languages to describe hardware, and compiler and synthesis technology bstract designs ...
Darin Petkov, Randolph E. Harr, Saman P. Amarasing...
PADO
2001
Springer
14 years 1 months ago
Type Systems for Useless-Variable Elimination
nt Abstractions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 J¨orgen Gustavsson, Josef Svenningsson Implementing Circularity Using Pa...
Adam Fischbach, John Hannan
CGO
2010
IEEE
14 years 3 months ago
Automatic creation of tile size selection models
Tiling is a widely used loop transformation for exposing/exploiting parallelism and data locality. Effective use of tiling requires selection and tuning of the tile sizes. This is...
Tomofumi Yuki, Lakshminarayanan Renganarayanan, Sa...
ECBS
2006
IEEE
158views Hardware» more  ECBS 2006»
14 years 2 months ago
Automated Translation of C/C++ Models into a Synchronous Formalism
For complex systems that are reusing intellectual property components, functional and compositional design correctness are an important part of the design process. Common system l...
Hamoudi Kalla, Jean-Pierre Talpin, David Berner, L...
CGO
2008
IEEE
14 years 3 months ago
Automatic array inlining in java virtual machines
Array inlining expands the concepts of object inlining to arrays. Groups of objects and arrays that reference each other are placed consecutively in memory so that their relative ...
Christian Wimmer, Hanspeter Mössenböck