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CASES
2007
ACM
13 years 11 months ago
2007
ACM
Recently dual-port SDRAM (DPSDRAM) architecture tailored for dual-processor based mobile embedded systems has been announced where a single memory chip plays the role of the local...
EUROPAR
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. Automatic performance analysis of parallel programs can be accomplished by scanning event traces of program execution for patterns representing inefficient behavior. The ...
HPDC
1999
IEEE
14 years 2 days ago
1999
IEEE
In this paper, we present the design and implementation of Dodo, an e cient user-level system for harvesting idle memory in o -the-shelf clusters of workstations. Dodo enables dat...
IROS
2007
IEEE
14 years 2 months ago
2007
IEEE
Abstract— Tactile telepresence has been expected to be technology which encourages operators of robotic systems to remotely maneuver objects or recognize materials being touched ...
IEEEPACT
2005
IEEE
14 years 1 months ago
2005
IEEE
Hiding communication latency is an important optimization for parallel programs. Programmers or compilers achieve this by using non-blocking communication primitives and overlappi...