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ICC
2011
IEEE
203views Communications» more  ICC 2011»
12 years 7 months ago
Constellation Shaping for Bit-Interleaved Coded APSK
—This paper considers a technique for shaping a turbo-coded amplitude-phase shift keying (APSK) constellation. After bit-interleaving, a subset of the bits output by a binary tur...
Matthew C. Valenti, Xingyu Xiang
LCPC
2004
Springer
14 years 21 days ago
Branch Strategies to Optimize Decision Trees for Wide-Issue Architectures
Abstract. Branch predictors are associated with critical design issues for nowadays instruction greedy processors. We study two important domains where the optimization of decision...
Patrick Carribault, Christophe Lemuet, Jean-Thomas...
SPAA
1993
ACM
13 years 11 months ago
Supporting Sets of Arbitrary Connections on iWarp Through Communication Context Switches
In this paper we introduce the ConSet communication model for distributed memory parallel computers. The communication needs of an application program can be satisfied by some ar...
Anja Feldmann, Thomas Stricker, Thomas E. Warfel
CGO
2005
IEEE
14 years 29 days ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
VLSID
1999
IEEE
99views VLSI» more  VLSID 1999»
13 years 11 months ago
Array Index Allocation under Register Constraints in DSP Programs
Abstract Code optimization for digital signal processors DSPs has been identi ed as an important new topic in system-level design of embedded systems. Both DSP processors and algor...
Anupam Basu, Rainer Leupers, Peter Marwedel