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ITC
1999
IEEE
107views Hardware» more  ITC 1999»
15 years 8 months ago
A high-level BIST synthesis method based on a region-wise heuristic for an integer linear programming
A high-level built-in self-test (BIST) synthesis involves several tasks such as system register assignment, interconnection assignment, and BIST register assignment. Existing high...
Han Bin Kim, Dong Sam Ha
ICPP
1998
IEEE
15 years 8 months ago
Efficient Collective Communication on Heterogeneous Networks of Workstations
Networks of Workstations (NOW) have become an attractive alternative platform for high performance computing. Due to the commodity nature of workstations and interconnects and due...
Mohammad Banikazemi, Vijay Moorthy, Dhabaleswar K....
DAC
1997
ACM
15 years 8 months ago
Structured Design of Microelectromechanical Systems
In order to efficiently design complex microelectromechanical systems (MEMS) having large numbers of multi-domain components, a hierarchically structured design approach that is ...
Tamal Mukherjee, Gary K. Fedder
ASPDAC
2007
ACM
129views Hardware» more  ASPDAC 2007»
15 years 8 months ago
ECO-system: Embracing the Change in Placement
In a realistic design flow, circuit and system optimizations must interact with physical aspects of the design. For example, improvements in timing and power may require replacing ...
Jarrod A. Roy, Igor L. Markov
FPGA
2006
ACM
141views FPGA» more  FPGA 2006»
15 years 8 months ago
A reconfigurable architecture for hybrid CMOS/Nanodevice circuits
This report describes a preliminary evaluation of possible performance of an FPGA-like architecture for future hybrid "CMOL" circuits which combine a semiconductor-trans...
Dmitri B. Strukov, Konstantin Likharev