2703 search results - page 124 / 541 » Optimizing memory transactions |
ISSS
1999
IEEE
14 years 1 months ago
1999
IEEE
Partition Scheduling with Prefetching (PSP) is a memory latency hiding technique which combines the loop pipelining technique with data prefetching. In PSP, the iteration space is...
ISSS
1996
IEEE
14 years 1 months ago
1996
IEEE
An address generation and optimization environment (ADOPT) for distributed memory architectures, is presented. ADOPT is oriented to minimize the area overhead introduced by the us...
FOCS
1990
IEEE
14 years 28 days ago
1990
IEEE
We present several e cient algorithms for sorting on the uniform memory hierarchy UMH, introduced by Alpern, Carter, and Feig, and its parallelization P-UMH. We give optimal and ne...
BC
2000
13 years 8 months ago
2000
The stochastic resonance (SR) phenomenon in human cognition (memory retrieval speed for arithmetical multiplication rules) is addressed in a behavioral and neurocomputational study...
ICPP
1995
IEEE
14 years 13 days ago
1995
IEEE
In this paper we study the problems of sorting and selection on the Distributed Memory Bus Computer (DMBC) recently introduced by Sahni. In particular we present: 1) An efficient a...