2703 search results - page 133 / 541 » Optimizing memory transactions |
ISLPED
1997
ACM
14 years 1 months ago
1997
ACM
Efficient use of an optimized memory hierarchy to exploit temporal locality in the memory accesses on array signals can have a very large impact on the power consumption in data ...
CIDR
2007
13 years 10 months ago
2007
While there are known performance trade-offs between database page buffer pool and query execution memory allocation policies, little has been written on the impact of query compi...
EUROPAR
2010
Springer
13 years 9 months ago
2010
Springer
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
TCAD
2008
13 years 8 months ago
2008
New fusion memory devices consisting of multiple heterogeneous memory components in a single die or package offer efficient ways to optimize embedded systems in terms of energy, pe...
CC
2006
Springer
14 years 20 days ago
2006
Springer
Abstract. Alias analysis, traditionally performed statically, is unsuited for a dynamic binary translator (DBT) due to incomplete control-flow information and the high complexity o...