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VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
14 years 10 months ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
LCTRTS
2010
Springer
14 years 4 months ago
Analysis and approximation for bank selection instruction minimization on partitioned memory architecture
A large number of embedded systems include 8-bit microcontrollers for their energy efficiency and low cost. Multi-bank memory architecture is commonly applied in 8-bit microcontr...
Minming Li, Chun Jason Xue, Tiantian Liu, Yingchao...
ICML
1997
IEEE
14 years 11 months ago
Predicting Multiprocessor Memory Access Patterns with Learning Models
Machine learning techniques are applicable to computer system optimization. We show that shared memory multiprocessors can successfully utilize machine learning algorithms for mem...
M. F. Sakr, Steven P. Levitan, Donald M. Chiarulli...
CC
2007
Springer
126views System Software» more  CC 2007»
14 years 4 months ago
An Array Allocation Scheme for Energy Reduction in Partitioned Memory Architectures
This paper presents a compiler technique that reduces the energy consumption of the memory subsystem, for an off-chip partitioned memory architecture having multiple memory banks ...
K. Shyam, R. Govindarajan
GECCO
2003
Springer
283views Optimization» more  GECCO 2003»
14 years 3 months ago
A Game-Theoretic Memory Mechanism for Coevolution
One problem associated with coevolutionary algorithms is that of forgetting, where one or more previously acquired traits are lost only to be needed later. We introduce a new coevo...
Sevan G. Ficici, Jordan B. Pollack