Sciweavers

2703 search results - page 6 / 541
» Optimizing memory transactions
Sort
View
ISLPED
2003
ACM
111views Hardware» more  ISLPED 2003»
14 years 21 days ago
Energy-aware memory allocation in heterogeneous non-volatile memory systems
Memory systems consume a significant portion of power in handheld embedded systems. So far, low-power memory techniques have addressed the power consumption when the system is tu...
Hyung Gyu Lee, Naehyuck Chang
MASCOTS
2010
13 years 9 months ago
Modeling the Run-time Behavior of Transactional Memory
In this paper, we develop a queuing theory based analytical model to evaluate the performance of transactional memory. Based on the statistical characteristics observed on actual e...
Zhengyu He, Bo Hong
ASPLOS
2004
ACM
14 years 27 days ago
Programming with transactional coherence and consistency (TCC)
Transactional Coherence and Consistency (TCC) offers a way to simplify parallel programming by executing all code within transactions. In TCC systems, transactions serve as the fu...
Lance Hammond, Brian D. Carlstrom, Vicky Wong, Ben...
ICPP
2009
IEEE
13 years 5 months ago
A Resource Optimized Remote-Memory-Access Architecture for Low-latency Communication
This paper introduces a new highly optimized architecture for remote memory access (RMA). RMA, using put and get operations, is a one-sided communication function which amongst ot...
Mondrian Nüssle, Martin Scherer, Ulrich Br&uu...
PODC
2010
ACM
13 years 11 months ago
Brief announcement: view transactions: transactional model with relaxed consistency checks
We present view transactions, a model for relaxed consistency checks in software transactional memory (STM). View transactions always operate on a consistent snapshot of memory bu...
Yehuda Afek, Adam Morrison, Moran Tzafrir