Sciweavers

620 search results - page 102 / 124
» Optimizing the BSD routing system for parallel processing
Sort
View
ICS
2007
Tsinghua U.
14 years 1 months ago
Automatic nonblocking communication for partitioned global address space programs
Overlapping communication with computation is an important optimization on current cluster architectures; its importance is likely to increase as the doubling of processing power ...
Wei-Yu Chen, Dan Bonachea, Costin Iancu, Katherine...
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
14 years 1 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
13 years 6 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
WSC
1997
13 years 9 months ago
Covalidation of Dissimilarly Structured Models
A methodology is presented which allows comparison between models under different modeling paradigms. Consider the following situation: Two models have been constructed to study d...
Samuel A. Wright, Kenneth W. Bauer Jr.
HOTI
2008
IEEE
14 years 2 months ago
Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics
We present a new monolithic silicon photonics technology suited for integration with standard bulk CMOS processes, which reduces costs and improves opto-electrical coupling compar...
Christopher Batten, Ajay Joshi, Jason Orcutt, Anat...