Sciweavers

620 search results - page 57 / 124
» Optimizing the BSD routing system for parallel processing
Sort
View
SBACPAD
2008
IEEE
206views Hardware» more  SBACPAD 2008»
14 years 3 months ago
A High Performance Massively Parallel Approach for Real Time Deformable Body Physics Simulation
Single processor technology has been evolving across last decades, but due to physical limitations of chip manufacturing process, the industry is pursuing alternatives to sustain ...
Thiago S. M. C. de Farias, Mozart W. S. Almeida, J...
ICDAR
2003
IEEE
14 years 2 months ago
A Low-Cost Parallel K-Means VQ Algorithm Using Cluster Computing
In this paper we propose a parallel approach for the Kmeans Vector Quantization (VQ) algorithm used in a twostage Hidden Markov Model (HMM)-based system for recognizing handwritte...
Alceu de Souza Britto Jr., Paulo Sergio Lopes de S...
HPCA
2011
IEEE
13 years 17 days ago
Mercury: A fast and energy-efficient multi-level cell based Phase Change Memory system
― Phase Change Memory (PCM) is one of the most promising technologies among emerging non-volatile memories. PCM stores data in crystalline and amorphous phases of the GST materia...
Madhura Joshi, Wangyuan Zhang, Tao Li
ASAP
2004
IEEE
171views Hardware» more  ASAP 2004»
14 years 17 days ago
CHARMED: A Multi-Objective Co-Synthesis Framework for Multi-Mode Embedded Systems
In this paper, we present a modular co-synthesis framework called CHARMED that solves the problem of hardware-software co-synthesis of periodic, multi-mode, distributed, embedded ...
Vida Kianzad, Shuvra S. Bhattacharyya
CODES
2005
IEEE
14 years 2 months ago
Improving superword level parallelism support in modern compilers
Multimedia vector instruction sets are becoming ubiquitous in most of the embedded systems used for multimedia, networking and communications. However, current compiler technology...
Christian Tenllado, Luis Piñuel, Manuel Pri...