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ICLP
1993
Springer
14 years 15 days ago
Turbo Erlang: Approaching the Speed of C
Erlang is a concurrent programming language designed for prototyping and implementing reliable real-time systems. In its design Erlanginherits someideas fromconcurrent logic progra...
Bogumil Hausman
ISPD
2012
ACM
252views Hardware» more  ISPD 2012»
12 years 4 months ago
Towards layout-friendly high-level synthesis
There are two prominent problems with technology scaling: increasing design complexity and more challenges with interconnect design, including routability. High-level synthesis ha...
Jason Cong, Bin Liu 0006, Guojie Luo, Raghu Prabha...
CGO
2008
IEEE
14 years 2 months ago
Fast liveness checking for ssa-form programs
Liveness analysis is an important analysis in optimizing compilers. Liveness information is used in several optimizations and is mandatory during the code-generation phase. Two dr...
Benoit Boissinot, Sebastian Hack, Daniel Grund, Be...
MEMOCODE
2003
IEEE
14 years 1 months ago
LOTOS Code Generation for Model Checking of STBus Based SoC: the STBus interconnect
In the design process of SoC (System on Chip), validation is one of the most critical and costly activity. The main problem for industrial companies like STMicroelectronics, stand...
Pierre Wodey, Geoffrey Camarroque, Fabrice Baray, ...
CORR
2006
Springer
143views Education» more  CORR 2006»
13 years 8 months ago
A Knowledge-Based Approach for Selecting Information Sources
Through the Internet and the World-Wide Web, a vast number of information sources has become available, which offer information on various subjects by different providers, often i...
Thomas Eiter, Michael Fink, Hans Tompits