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CJ
2006
84views more  CJ 2006»
13 years 8 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
WDAG
2010
Springer
196views Algorithms» more  WDAG 2010»
13 years 6 months ago
Brief Announcement: Failure Detectors Encapsulate Fairness
Abstract. We argue that failure detectors encapsulate fairness. Fairness is a measure of the number of steps a process takes relative to another processes and/or messages in transi...
Scott M. Pike, Srikanth Sastry, Jennifer L. Welch
ADHOC
2010
292views more  ADHOC 2010»
13 years 8 months ago
Sleep/wake scheduling for multi-hop sensor networks: Non-convexity and approximation algorithm
We investigate the problem of sleep/wake scheduling for low duty cycle sensor networks. Our work differs from prior work in that we explicitly consider the effect of synchronizati...
Yan Wu, Sonia Fahmy, Ness B. Shroff
HIPS
1998
IEEE
14 years 23 days ago
Constructive and Adaptable Distributed Shared Memory
Distributed shared memory (DSM) is a paradigm for programming distributed systems, which provides an alternative to the message passing model. DSM offers the agents of the system ...
Jordi Bataller, José M. Bernabéu-Aub...
IROS
2007
IEEE
100views Robotics» more  IROS 2007»
14 years 2 months ago
Roughness feeling telepresence system on the basis of real-time estimation of surface wavelengths
Abstract— Tactile telepresence has been expected to be technology which encourages operators of robotic systems to remotely maneuver objects or recognize materials being touched ...
Shogo Okamoto, Masashi Konyo, Takashi Maeno, Satos...