1990 search results - page 25 / 398 » Optimizing the Instruction Cache Performance of the Operatin... |
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper, we investigate the impact of Tox and Vth on power performance trade-offs for on-chip caches. We start by examining the optimization of the various components of a s...
EUROPAR
1997
Springer
13 years 11 months ago
1997
Springer
Instruction scheduling in general, and software pipelining in particular face the di cult task of scheduling operations in the presence of uncertain latencies. The largest contrib...
FAST
2008
13 years 10 months ago
2008
Operating system memory managers fail to consider the population of read versus write pages in the buffer pool or outstanding I/O requests when writing dirty pages to disk or netw...
APCSAC
2001
IEEE
13 years 11 months ago
2001
IEEE
In this paper, a new architecture called the extendable instruction set computer (EISC) is introduced that addresses the issues of memory size and performance in embedded micropro...
SC
2004
ACM
14 years 1 months ago
2004
ACM
The file-bundle caching problem arises frequently in scientific applications where jobs process several files concurrently. Consider a host system in a data-grid that maintains...