1990 search results - page 36 / 398 » Optimizing the Instruction Cache Performance of the Operatin... |
IISWC
2006
IEEE
14 years 1 months ago
2006
IEEE
—The rapid pace of change in 3D game technology makes workload characterization necessary for every game generation. Comparing to CPU characterization, far less quantitative info...
CGO
2007
IEEE
14 years 2 months ago
2007
IEEE
Modern memory systems play a critical role in the performance of applications, but a detailed understanding of the application behavior in the memory system is not trivial to atta...
MICRO
2002
IEEE
13 years 7 months ago
2002
IEEE
Power consumption and power density for the Translation Lookaside Buffer (TLB) are important considerations not only in its design, but can have a consequence on cache design as w...
ISCA
1997
IEEE
13 years 11 months ago
1997
IEEE
In this paper we evaluate the performance of high bandwidth caches that employ multiple ports, multiple cycle hit times, on-chip DRAM, and a line buffer to find the organization t...
LCPC
2005
Springer
14 years 1 months ago
2005
Springer
Programming network processors remains a challenging task since their birth until recently when high-level programming environments for them are emerging. By employing domain speci...