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RTSS
2006
IEEE
14 years 1 months ago
Tightening the Bounds on Feasible Preemption Points
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller
SIGMETRICS
2012
ACM
267views Hardware» more  SIGMETRICS 2012»
11 years 10 months ago
Smartphones vs. laptops: comparing web browsing behavior and the implications for caching
In this work we present the differences and similarities of the web browsing behavior in most common mobile platforms. We devise a novel Operating System (OS) fingerprinting met...
Ioannis Papapanagiotou, Erich M. Nahum, Vasileios ...
INFOCOM
2003
IEEE
14 years 29 days ago
Improving Web Performance in Broadcast-Unicast Networks
— Satellite operators have recently begun offering Internet access over their networks. Typically, users connect to the network using a modem for uplink, and a satellite dish for...
Mukesh Agrawal, Amit Manjhi, Nikhil Bansal, Sriniv...
DATE
2005
IEEE
133views Hardware» more  DATE 2005»
14 years 1 months ago
Locality-Aware Process Scheduling for Embedded MPSoCs
Utilizing on-chip caches in embedded multiprocessorsystem-on-a-chip (MPSoC) based systems is critical from both performance and power perspectives. While most of the prior work th...
Mahmut T. Kandemir, Guilin Chen
COMPUTER
2002
103views more  COMPUTER 2002»
13 years 7 months ago
SimpleScalar: An Infrastructure for Computer System Modeling
tail defines the level of abstraction used to implement the model's components. A highly detailed model will faithfully simulate all aspects of machine operation, whether or n...
Todd M. Austin, Eric Larson, Dan Ernst