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SBACPAD
2008
IEEE
170views Hardware» more  SBACPAD 2008»
14 years 1 months ago
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
James Poe, Chang-Burm Cho, Tao Li
PODC
2010
ACM
13 years 11 months ago
Transactional predication: high-performance concurrent sets and maps for STM
Concurrent collection classes are widely used in multi-threaded programming, but they provide atomicity only for a fixed set of operations. Software transactional memory (STM) pr...
Nathan Grasso Bronson, Jared Casper, Hassan Chafi,...
ASPLOS
2011
ACM
12 years 11 months ago
Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...
Luke Dalessandro, François Carouge, Sean Wh...
POPL
2009
ACM
14 years 8 months ago
The semantics of progress in lock-based transactional memory
Transactional memory (TM) is a promising paradigm for concurrent programming. Whereas the number of TM implementations is growing, however, little research has been conducted to p...
Rachid Guerraoui, Michal Kapalka
PPOPP
2009
ACM
14 years 8 months ago
A comprehensive strategy for contention management in software transactional memory
In Software Transactional Memory (STM), contention management refers to the mechanisms used to ensure forward progress-to avoid livelock and starvation, and to promote throughput ...
Michael F. Spear, Luke Dalessandro, Virendra J. Ma...