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HIPC
2009
Springer
15 years 5 months ago
Fast checkpointing by Write Aggregation with Dynamic Buffer and Interleaving on multicore architecture
Large scale compute clusters continue to grow to ever-increasing proportions. However, as clusters and applications continue to grow, the Mean Time Between Failures (MTBF) has redu...
Xiangyong Ouyang, Karthik Gopalakrishnan, Tejus Ga...
IISWC
2008
IEEE
16 years 1 months ago
Energy-aware application scheduling on a heterogeneous multi-core system
Heterogeneous multi-core processors are attractive for power efficient computing because of their ability to meet varied resource requirements of diverse applications in a workloa...
Jian Chen, Lizy Kurian John
DAC
2007
ACM
16 years 8 months ago
The KILL Rule for Multicore
Multicore has shown significant performance and power advantages over single cores in commercial systems with a 2-4 cores. Applying a corollary of Moore's Law for multicore, ...
Anant Agarwal, Markus Levy
IISWC
2006
IEEE
16 years 1 months ago
Characterization of Scientific Workloads on Systems with Multi-Core Processors
Multi-core processors are planned for virtually all next-generation HPC systems. In a preliminary evaluation of AMD Opteron Dual-Core processor systems, we investigated the scaling...
Sadaf R. Alam, Richard F. Barrett, Jeffery A. Kueh...
PRDC
2007
IEEE
16 years 1 months ago
Power-Performance Trade-Off of a Dependable Multicore Processor
As deep submicron technologies are advanced, new challenges, such as power consumption and soft errors, are emerging. A naïve technique, which utilizes emerging multicore process...
Toshinori Sato, Toshimasa Funaki