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PC
2011
318views Management» more  PC 2011»
13 years 4 months ago
High-performance message-passing over generic Ethernet hardware with Open-MX
In the last decade, cluster computing has become the most popular high-performance computing architecture. Although numerous technological innovations have been proposed to improv...
Brice Goglin
GRAPHICSINTERFACE
2003
13 years 11 months ago
Hardware-Accelerated Visual Hull Reconstruction and Rendering
We present a novel algorithm for simultaneous visual hull reconstruction and rendering by exploiting off-theshelf graphics hardware. The reconstruction is accomplished by projecti...
Ming Li, Marcus A. Magnor, Hans-Peter Seidel
ISCA
2003
IEEE
212views Hardware» more  ISCA 2003»
14 years 3 months ago
A Performance Analysis of PIM, Stream Processing, and Tiled Processing on Memory-Intensive Signal Processing Kernels
Trends in microprocessors of increasing die size and clock speed and decreasing feature sizes have fueled rapidly increasing performance. However, the limited improvements in DRAM...
Jinwoo Suh, Eun-Gyu Kim, Stephen P. Crago, Lakshmi...
IPPS
2003
IEEE
14 years 3 months ago
Performance Monitoring and Evaluation of a UPC Implementation on a NUMA Architecture
UPC is an explicit parallel extension of ANSI C, which has been gaining rising attention from vendors and users. In this work, we consider the low-level monitoring and experimenta...
François Cantonnet, Yiyi Yao, Smita Annared...
IPPS
1998
IEEE
14 years 2 months ago
BIP: A New Protocol Designed for High Performance Networking on Myrinet
Abstract. High speed networks are now providing incredible performances. Software evolution is slow and the old protocol stacks are no longer adequate for these kind of communicati...
Loïc Prylli, Bernard Tourancheau