230 search results - page 41 / 46 » PPM Reduction on Embedded Memories in System on Chip |
TCAD
2008
13 years 7 months ago
2008
New fusion memory devices consisting of multiple heterogeneous memory components in a single die or package offer efficient ways to optimize embedded systems in terms of energy, pe...
ISPD
2006
ACM
14 years 1 months ago
2006
ACM
Physical Design of modern systems on chip is extremely challenging. Such digital integrated circuits often contain tens of millions of logic gates, intellectual property blocks, e...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— Program code size has become a critical design constraint of embedded systems. Large program codes require large memories, which increase the size and cost of the chip. Poor co...
ICS
2005
Tsinghua U.
14 years 1 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...