Solving hard instances of floorplacement

Physical Design of modern systems on chip is extremely challenging. Such digital integrated circuits often contain tens of millions of logic gates, intellectual property blocks, embedded memories and custom RTL blocks. At current and future technology nodes, their power and performance are impacted, more than ever, by the placement of their modules. However, our experiments show that traditional techniques for placement and floorplanning, and existing academic tools cannot reliably solve the placement task. To study this problem, we identify particularly difficult industrial instances and reproduce the failures of existing tools by modifying public-domain netlists. Furthermore, we propose algorithms that facilitate floorplacement of these difficult instances. Empirically, our techniques consistently produced legal placements, and on instances where comparison is possible, reduced wirelength by 3.5%

• Type: Conference
• Year: 2006
• Where: ISPD
• Authors: Aaron N. Ng, Igor L. Markov, Rajat Aggarwal, Venky Ramachandran
• Keywords: Custom Rtl Blocks, Difficult Industrial Instances, Hardware, Intellectual Property Blocks, ISPD 2006