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ISPD
2012
ACM
252views Hardware» more  ISPD 2012»
12 years 3 months ago
Towards layout-friendly high-level synthesis
There are two prominent problems with technology scaling: increasing design complexity and more challenges with interconnect design, including routability. High-level synthesis ha...
Jason Cong, Bin Liu 0006, Guojie Luo, Raghu Prabha...
CVPR
2012
IEEE
11 years 10 months ago
Boosting algorithms for simultaneous feature extraction and selection
The problem of simultaneous feature extraction and selection, for classifier design, is considered. A new framework is proposed, based on boosting algorithms that can either 1) s...
Mohammad J. Saberian, Nuno Vasconcelos
SPAA
2004
ACM
14 years 29 days ago
Cache-oblivious shortest paths in graphs using buffer heap
We present the Buffer Heap (BH), a cache-oblivious priority queue that supports Delete-Min, Delete, and Decrease-Key operations in O( 1 B log2 N B ) amortized block transfers fro...
Rezaul Alam Chowdhury, Vijaya Ramachandran
CVPR
2009
IEEE
15 years 2 months ago
Harris Corners in the Real World: A Principled Selection Criterion for Interest Points Based on Ecological Statistics
In this report, we consider whether statistical regularities in natural images might be exploited to provide an improved selection criterion for interest points. One approach that ...
Neil D. B. Bruce, Pierre Kornprobst
ICDE
2005
IEEE
139views Database» more  ICDE 2005»
14 years 9 months ago
Compressing Bitmap Indices by Data Reorganization
Many scientific applications generate massive volumes of data through observations or computer simulations, bringing up the need for effective indexing methods for efficient stora...
Ali Pinar, Tao Tao, Hakan Ferhatosmanoglu