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» Packet Routing on the Grid
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HPCA
2009
IEEE
16 years 4 months ago
Prediction router: Yet another low latency on-chip router architecture
Network-on-Chips (NoCs) are quite latency sensitive, since their communication latency strongly affects the application performance on recent many-core architectures. To reduce th...
Hiroki Matsutani, Michihiro Koibuchi, Hideharu Ama...
160
Voted
MICRO
2008
IEEE
131views Hardware» more  MICRO 2008»
15 years 10 months ago
Token flow control
As companies move towards many-core chips, an efficient onchip communication fabric to connect these cores assumes critical importance. To address limitations to wire delay scala...
Amit Kumar 0002, Li-Shiuan Peh, Niraj K. Jha
ISVLSI
2007
IEEE
150views VLSI» more  ISVLSI 2007»
15 years 10 months ago
Minimum-Congestion Placement for Y-interconnects: Some studies and observations
— Y -interconnects for VLSI chips are based on the use of global and semi-global wiring in only 0◦ , 60◦ , and 120◦ . Though X-interconnects are fast replacing the traditio...
Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Pa...
148
Voted
ICDCSW
2009
IEEE
15 years 10 months ago
Dynamic TCP Proxies: Coping with Disadvantaged Hosts in MANETs
Applications in mobile ad-hoc networks can suffer from poor link quality and degraded network services. In particular, standard TCP over low-quality, long routing paths, can have ...
Tu Ouyang, Shudong Jin, Michael Rabinovich
145
Voted
MOBIQUITOUS
2007
IEEE
15 years 10 months ago
A Ferry-based Intrusion Detection Scheme for Sparsely Connected Ad Hoc Networks
— Several intrusion detection approaches have been proposed for mobile adhoc networks. Many of the approaches assume that there are sufficient neighbors to help monitor the trans...
Mooi Choo Chuah, Peng Yang, Jianbin Han