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IEEEPACT
2006
IEEE
14 years 22 days ago
Region array SSA
Static Single Assignment (SSA) has become the intermediate program representation of choice in most modern compilers because it enables efficient data flow analysis of scalars an...
Silvius Rus, Guobin He, Christophe Alias, Lawrence...
IEEEPACT
2003
IEEE
13 years 12 months ago
Resolving Register Bank Conflicts for a Network Processor
This paper discusses a register bank assignment problem for a popular network processor--Intel's IXP. Due to limited data paths, the network processor has a restriction that ...
Xiaotong Zhuang, Santosh Pande
ICCD
1999
IEEE
110views Hardware» more  ICCD 1999»
13 years 11 months ago
TriMedia CPU64 Architecture
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-J...
DAC
2003
ACM
14 years 7 months ago
Using estimates from behavioral synthesis tools in compiler-directed design space exploration
This paper considers the role of performance and area estimates from behavioral synthesis in design space exploration. We have developed a compilation system that automatically ma...
Byoungro So, Pedro C. Diniz, Mary W. Hall
IPPS
2008
IEEE
14 years 1 months ago
A modeling approach for estimating execution time of long-running scientific applications
In a Grid computing environment, resources are shared among a large number of applications. Brokers and schedulers find matching resources and schedule the execution of the applic...
Seyed Masoud Sadjadi, Shu Shimizu, Javier Figueroa...