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DATE
2007
IEEE
133views Hardware» more  DATE 2007»
14 years 1 months ago
Butterfly and benes-based on-chip communication networks for multiprocessor turbo decoding
Several research activities have recently emerged aiming to propose multiprocessor implementations in order to achieve flexible and high throughput parallel iterative decoding. Be...
Hazem Moussa, Olivier Muller, Amer Baghdadi, Miche...
EMSOFT
2004
Springer
14 years 23 days ago
An approach for integrating basic retiming and software pipelining
Basic retiming is an algorithm originally developed for hardware optimization. Software pipelining is a technique proposed to increase instruction-level parallelism for parallel p...
Noureddine Chabini, Wayne Wolf
ICDCS
2003
IEEE
14 years 20 days ago
Compiler Scheduling of Mobile Agents for Minimizing Overheads
Mobile code carried by a mobile agent can automatically travel to several data sources in order to complete a designated program. Traditionally, most mobile agent systems [7][8][1...
Xiaotong Zhuang, Santosh Pande
ISHPC
2003
Springer
14 years 17 days ago
Performance Study of a Whole Genome Comparison Tool on a Hyper-Threading Multiprocessor
We developed a multithreaded parallel implementation of a sequence alignment algorithm that is able to align whole genomes with reliable output and reasonable cost. This paper pres...
Juan del Cuvillo, Xinmin Tian, Guang R. Gao, Milin...
PPOPP
2010
ACM
14 years 4 months ago
Lazy binary-splitting: a run-time adaptive work-stealing scheduler
We present Lazy Binary Splitting (LBS), a user-level scheduler of nested parallelism for shared-memory multiprocessors that builds on existing Eager Binary Splitting work-stealing...
Alexandros Tzannes, George C. Caragea, Rajeev Baru...