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TVLSI
2010
13 years 2 months ago
Exploration of Heterogeneous FPGAs for Mapping Linear Projection Designs
In many applications, a reduction of the amount of the original data or a representation of the original data by a small set of variables is often required. Among many techniques, ...
Christos-Savvas Bouganis, Iosifina Pournara, Peter...
ICA3PP
2010
Springer
14 years 8 days ago
Accelerating Euler Equations Numerical Solver on Graphics Processing Units
Abstract. Finite volume numerical methods have been widely studied, implemented and parallelized on multiprocessor systems or on clusters. Modern graphics processing units (GPU) pr...
Pierre Kestener, Frédéric Chât...
IPPS
2007
IEEE
14 years 1 months ago
A new framework to accelerate Virtex-II Pro dynamic partial self-reconfiguration
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...
Christopher Claus, Florian Helmut Müller, Joh...
FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
14 years 1 months ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...
ASAP
2008
IEEE
167views Hardware» more  ASAP 2008»
14 years 1 months ago
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms
Process technology has reduced in size such that it is possible to implement complete applicationspecific architectures as Systems-on-Chip (SoCs) using both Application-Specific I...
David Dickin, Lesley Shannon