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SPAA
2000
ACM
13 years 11 months ago
Compact, multilayer layout for butterfly fat-tree
Modern VLSI processing supports a two-dimensional surface for active devices along with multiple stacked layers of interconnect. With the advent of planarization, the number of la...
André DeHon
DAC
2010
ACM
13 years 11 months ago
Efficient fault simulation on many-core processors
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
Michael A. Kochte, Marcel Schaal, Hans-Joachim Wun...
ICDCS
2010
IEEE
13 years 10 months ago
Using Analog Network Coding to Improve the RFID Reading Throughput
Abstract—RFID promises to revolutionize the inventory management in large warehouses, retail stores, hospitals, transportation systems, etc. Periodically reading the IDs of the t...
Ming Zhang, Tao Li, Shigang Chen, Bo Li
ESCIENCE
2007
IEEE
13 years 9 months ago
The Ring Buffer Network Bus (RBNB) DataTurbine Streaming Data Middleware for Environmental Observing Systems
— The environmental science and engineering communities are actively engaged in planning and developing the next generation of large-scale sensor-based observing systems. These s...
Sameer Tilak, Paul Hubbard, Matt Miller, Tony Foun...
DCOSS
2008
Springer
13 years 9 months ago
Decoding Code on a Sensor Node
Abstract. Wireless sensor networks come of age and start moving out of the laboratory into the field. As the number of deployments is increasing the need for an efficient and relia...
Pascal von Rickenbach, Roger Wattenhofer