309 search results - page 11 / 62 » Parallel Memory Architecture for Arbitrary Stride Accesses |
HPCN
1997
Springer
13 years 11 months ago
1997
Springer
Abstract. We describe a programming interface for parallel computing on NUMA (NonUniform Memory Access) shared memory machines. Although the interest in this architecture is rapidl...
HPCA
1997
IEEE
13 years 11 months ago
1997
IEEE
Many parallel systems offer a simple view of memory: all storage cells are addresseduniformly. Despite a uniform view of the memory, the machines differsignificantly in theirmemo...
ISCA
1990
IEEE
13 years 11 months ago
1990
IEEE
An adaptive cache coherence mechanism exploits semantic information about the expected or observed access behavior of particular data objects. We contend that, in distributed shar...
IPPS
2009
IEEE
14 years 2 months ago
2009
IEEE
In this paper we use Dijkstra’s algorithm as a challenging, hard to parallelize paradigm to test the efficacy of several parallelization techniques in a multicore architecture....
ISVLSI
2006
IEEE
14 years 1 months ago
2006
IEEE
One major issue in designing image processors is to design a memory system that supports parallel access with a simple interconnection network. This paper presents a design method...