309 search results - page 12 / 62 » Parallel Memory Architecture for Arbitrary Stride Accesses |
PPOPP
2010
ACM
14 years 4 months ago
2010
ACM
Loop vectorization, a key feature exploited to obtain high performance on Single Instruction Multiple Data (SIMD) vector architectures, is significantly hindered by irregular memo...
IPPS
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper presents a compiler methodology for memoryaware mapping on 2-Dimensional coarse-grained reconfigurable architectures that aims in improving the mapped applications’ p...
DAC
2011
ACM
12 years 7 months ago
2011
ACM
Memory consistency litmus tests are small parallel programs that are designed to illustrate subtle differences between memory consistency models by exhibiting different outcomes...
HPCC
2007
Springer
14 years 1 months ago
2007
Springer
The grid security architecture today does not prevent certain unauthorized access to the files associated with a job executing on a remote machine. Programs and data are transferre...
ASAP
2005
IEEE
14 years 1 months ago
2005
IEEE
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...