309 search results - page 47 / 62 » Parallel Memory Architecture for Arbitrary Stride Accesses |
HPCA
2008
IEEE
14 years 8 months ago
2008
IEEE
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
CLUSTER
2008
IEEE
14 years 2 months ago
2008
IEEE
—User-level communication allows an application process to access the network interface directly. Bypassing the kernel requires that a user process accesses the network interface...
OPODIS
2004
13 years 9 months ago
2004
Abstract. We present an efficient and practical lock-free implementation of a concurrent deque that supports parallelism for disjoint accesses and uses atomic primitives which are ...
IPPS
2008
IEEE
14 years 1 months ago
2008
IEEE
We present an auto-tuning approach to optimize application performance on emerging multicore architectures. The methodology extends the idea of searchbased performance optimizatio...
IEEEPACT
2002
IEEE
14 years 14 days ago
2002
IEEE
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...